1. Field of the Invention
The invention relates to a CMOS image sensor array design that is capable of substantially reducing reset noise. More specifically, the invention relates to an array of active pixels having rows and columns with one amplifier for each column to produce a feedback to the reset transistors of the respective column to reduce noise.
2. Description of the Related Art
CMOS image sensors are attractive due to the compatibility with VLSI circuits. However, CMOS imagers have typically higher noise than CCD imagers. While CCD imagers employ correlated double-sampling (CDS) to remove the reset noise commonly referred to as kTC noise, the operation of most CMOS imagers does not allow true CDS. Instead, uncorrelated double-sampling is employed to remove the constant reset level. Unfortunately, this method actually increases reset noise.
Prior art CMOS pixel designs disclose correlated-doubling sampling incorporated in the pixel design. Although this circuit substantially removes the reset noise, an amplifier and two additional devices are necessary within each pixel to provide the CDS function, greatly increasing the area of the pixel. What is needed is a CMOS image sensor array design where each active pixel in the image sensor array does not need a separate amplifier.
A CMOS image sensor array has rows and columns of active pixels. In addition, there are one or more column lines each cooperating with the active pixels in the respective columns. Each active pixel in a column has an output connected to the column line. Each active pixel includes a photodiode that produces a signal proportional to incident light intensity. The proportional signal may be current, voltage, or charge. The proportional signal is applied to the active pixel output if the column select and row select are appropriately set. In addition, each active pixel has a reset transistor to reset the pixel. Each reset transistor has a gate and first and second terminals. A reset voltage is applied to the gate of each reset transistor to reset the transistors.
The CMOS image sensor array also has one or more amplifiers. Each amplifier has a first input connected to the column line. Each amplifier also provides a negative feedback output to the first terminal of each reset transistor of the active pixels for the respective cooperating column line. A reset reference voltage is applied to a second input of each amplifier to adjust the negative feedback to set the voltage at the second terminal of each reset transistor to a desired reset voltage. The second terminal of each reset transistor cooperates with the first input of the respective amplifier for the column.
The voltage at each said second terminal is VTxcex94V below the reset voltage, where xcex94V keeps the reset transistor in the subthreshold region in the steady state of the reset phase. The xcex94V typically exceeds one hundred millivolts.
The CMOS image sensor array has one or more row lines each cooperating with the active pixels in a row. Each active pixel in the row has a row select transistor coupled between its respective second terminal and the first input of the respective amplifier.
The CMOS image sensor array further has a source follower transistor coupled between the second terminal and the row select transistor of each active pixel.
The first advantage of the present invention is that it provides a CMOS imager design that is capable of substantially reducing the reset noise.
A second advantage of the present invention is that it provides a reset noise reduction without substantially increasing the complexity of the pixel. More specifically, the present invention avoids the inclusion of an amplifier in each pixel.